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AI:AM LIVE — July 2, 2026 — The Export Regime Blinks and Washington Eyes a Stake in the Frontier: Kunle Olukotun

The opening tracked a week in which the US government kept fusing with the frontier — first over access, now over ownership — while open-weights economics quietly undercut the whole premium.

Episode overview

The opening tracked a week in which the US government kept fusing with the frontier — first over access, now over ownership — while open-weights economics quietly undercut the whole premium. Commerce withdrew the export-control requirement on Anthropic's Fable 5 and Mythos 5 after an 18-day freeze, and Anthropic began restoring Fable 5 globally under new terms: a cyber-classifier, a HackerOne bounty program, a cross-lab jailbreak-severity framework, and — the load-bearing part — earlier pre-release access for the US government to test future frontier models. In the same window, the FT reported OpenAI floated a ~5% stake (roughly $42.6B) to Washington, with Altman said to have proposed the same from every leading US lab into an Alaska-Permanent-Fund-style vehicle. Underneath the policy noise, the business fight got quantified: independent evals now rank GLM-5.2 the top open-weights model and #3 overall on agentic knowledge work (though verbose and hallucination-prone), and a Chamath n=1 pilot pairing it with an agent harness cut a modernization task's cost ~16× vs Opus 4.8. Kunle Olukotun — co-founder & Chief Technologist of SambaNova, Stanford's Cadence Design Systems Professor and a father of the multicore processor — then joined for the architect's-seat conversation on whether reconfigurable-dataflow silicon (the RDU) finally wins the economics of reasoning-model and agentic inference. Nathan pressed the dataflow-vs-GPU thesis (map the model's dataflow graph onto silicon rather than stream instructions through fixed cores), the three-tier-memory bet, and the Composition-of-Experts pitch (many specialized models resident on one system, which the SN50 is purpose-built for) against a brutally consolidated 2026 field: Nvidia bought Groq for ~$20B, Cerebras IPO'd at ~$66B, and Intel — after reportedly exploring a ~$1.6B acquisition — instead took a Series E stake in SambaNova's down round (~$2.2B, from $5.1B). The recency-disciplined proof point: SambaNova set a DeepSeek-R1 671B speed record (~198 tokens/sec/user on 16 SN40L RDUs) verified by Artificial Analysis in February 2025 — now ~17 months old, so framed as trajectory, not current best, with the live question being where custom silicon durably wins on cost-per-useful-token and whether the independent inference-chip bet ends in absorption or independence.

The conversation

Interview: Kunle Olukotun — SambaNova Dataflow Inference and Surviving the Alt-Silicon Shakeout

Kunle Olukotun — co-founder & Chief Technologist of SambaNova, Stanford's Cadence Design Systems Professor and a father of the multicore processor — joined for the architect's-seat conversation on whether reconfigurable-dataflow silicon (the RDU) finally wins the economics of reasoning-model and agentic inference. The through-line: why mapping a model's dataflow graph onto silicon beats streaming instructions through fixed GPU cores, the SN40L three-tier-memory bet, and the Composition-of-Experts thesis (many specialized models resident on one system, which the newly announced SN50 is purpose-built for). Nathan pushed the contested economics against a brutally consolidated 2026 field — Nvidia bought Groq for ~$20B, Cerebras IPO'd at ~$66B, and Intel took a Series E stake in SambaNova's down round after reportedly exploring an outright acquisition — and pressed on recency: SambaNova's DeepSeek-R1 671B speed record (~198 tokens/sec/user on 16 SN40L RDUs), verified by Artificial Analysis in February 2025, is now ~17 months old, so the live question is where custom silicon durably wins on cost-per-useful-token and whether the independent inference-chip bet ends in absorption or independence.

Kunle Olukotun

Kunle Olukotun joined AI:AM to talk dataflow inference at SambaNova, the company he co-founded in 2017 with Chris Ré. Prakash introduced him with his academic pedigree — the Stanford Hydra project that helped establish the modern multicore processor in the late 1990s — before framing the segment around SambaNova's Reconfigurable Dataflow Unit (RDU), the recent SN50 chip launch, an architecture partnership with Intel, an enterprise rollout with Vista Equity Partners, and reports of a roughly $10 billion valuation target.

The core of the conversation was Kunle's case that inference, unlike training, is not a compute problem but a data-movement problem: moving model weights and the KV cache from memory to compute units, and between chips. He argued GPUs typically use only 10 to 20% of their peak memory bandwidth and communication resources, whereas SambaNova's RDU architecture targets 70 to 80% of peak — a 5 to 10x improvement — by fusing decode into a single kernel ('kernel looping') and routing chip-to-chip communication through SRAM rather than HBM, so communication becomes just another overlapped pipeline stage instead of a synchronization bottleneck. He framed the commercial goal as producing 'premium tokens' — output from large, accurate models delivered at high speed, which he sees as the currency of the agentic-AI era.

Nathan pushed Kunle to taxonomize the broader chip landscape — Cerebras, Groq, GPUs, and dataflow — across three axes: flexibility versus specialization, which tier of memory a design leans on, and whether communication is orchestrated by software or by hardware. Kunle argued reconfigurable dataflow sits in the sweet spot: flexible enough to adapt across model architectures (he was explicit about not wanting to burn any single algorithm, including today's transformers, permanently into silicon), while using hardware-driven pipelining to overlap computation and communication in a way GPUs — and, in his view, SRAM-only rivals like Cerebras and Groq — cannot.

The discussion also covered concrete trade-offs: SambaNova's SN40 could match GPU throughput at 3 to 5x higher speed, while the newer SN50 trades some raw compute for the ability to scale tensor parallelism far wider, winning past roughly 250–500 tokens/second/user; disaggregated GPU-plus-RDU deployments (GPUs for prefill, RDUs for decode); and how SambaNova builds its own compiler around a PyTorch-level dataflow representation to avoid CUDA entirely. Kunle laid out a roadmap built on an 18-month chip cadence, closing the HBM generation gap with Nvidia, and continuing to bet on architectural flexibility as models evolve toward state-space and other more linear approaches.

The segment was repeatedly interrupted by audio and connectivity problems, costing several minutes of live troubleshooting. In the closing stretch, Nathan asked what would ultimately gate SambaNova's ability to scale — echoing the recurring 'what is Nvidia's moat' question — but the connection dropped again before Kunle could answer fully. Prakash filled the gap with his own read: SambaNova's chairman is Intel's Lip-Bu Tan, tying the company to Intel Foundry capacity, while Nvidia appears to be sidestepping antitrust exposure by funding new manufacturing capacity (such as a glass-optics factory with Corning) rather than simply buying up existing supply, and smaller chip startups typically access fab capacity by paying Broadcom or Qualcomm for a cut of their allocated wafer slots at TSMC.

“If you do it right, you can get a 5 to 10x improvement over where GPUs are today.”

“Premium tokens are tokens that you can charge the most money for because they are premium. Why are they premium? Because they come from very large models, so they're accurate, but they're also provided to you at high speed.”

“I've learned never to bet against the innovation capabilities of software people and algorithm people.”

Can you tell us how SambaNova's paradigm addresses the issues with GPUs and brings down the total cost of ownership for enterprises? 1:36:24 ↗
SambaNova, founded in 2017 with Chris Ré, designed from scratch an architecture optimized for inference rather than training. GPUs were built for graphics and HPC and are matrix-multiplication/compute-optimized, but inference is a data-movement problem — moving weights and the KV cache from memory to compute units and between chips. SambaNova's focus is minimizing communication overhead and maximizing memory-hierarchy utilization, yielding a 5-10x improvement over today's GPUs.
Chip users often focus on model FLOPS utilization (MFU) — is that SambaNova's North Star, or are other metrics more important? 1:42:15 ↗
The real 'speed of light' for high-speed inference is memory bandwidth utilization, not FLOPS. In the agentic-AI era, the goal is 'premium tokens' — accurate output from large models delivered fast — which is bottlenecked by moving the KV cache and parameters from HBM to compute, not by floating-point throughput; most inference workloads are memory- or communication-bound rather than compute-bound.
Can you taxonomize the whole chip space — Cerebras, transformer-burned-into-silicon approaches, and so on — the strengths and weaknesses of each strategy, and whether there are 'cliffs' where a paradigm stops working as models scale? 1:44:48 ↗
Three axes: flexibility versus specialization (CPU/GPU instruction-driven flexibility versus burning a fixed algorithm into silicon, which breaks if the algorithm changes — he's wary of over-fixing given how fast ML algorithms evolve); which memory tier a design leans on (on-chip SRAM vs. off-chip HBM vs. terabytes of flash/DDR); and how memory transfers and communication are managed (software/instruction-driven vs. hardware). Reconfigurable dataflow hits the sweet spot: flexible at the timescale that matters for AI (per inference session, not per cycle), while using hardware-level pipelining to overlap communication and computation — the key advantage over GPUs, which synchronize data movement in software and add overhead.
Can you contextualize the HBM difference for a model like Llama 3 on an H100/B200 versus an RDU? 1:53:46 ↗
It's not a capacity question, it's a bandwidth-efficiency question. GPUs waste HBM bandwidth two ways: executing the decode algorithm one kernel at a time (moving intermediate data to HBM and back between kernels) and losing time to kernel-launch/synchronization overhead. SambaNova fuses the whole decoder into a single kernel ('kernel looping') and communicates cross-chip results via SRAM-to-SRAM transfers that bypass HBM entirely, keeping HBM continuously and efficiently utilized — this is also what lets SambaNova scale tensor parallelism far wider than GPUs, which struggle beyond 4- to 8-way.
What trade-offs ('bullets') does this architecture require you to accept, and how does your Pareto frontier — throughput versus speed-per-user — compare to GPUs? Who's the sweet-spot customer? 2:02:30 ↗
On the previous-generation SN40, SambaNova matched GPU throughput at 3-5x higher speed; SN50 has less raw compute, so GPUs still win at very large batch sizes, but past roughly 250-500 tokens/second/user SambaNova is 3-5x better than GPUs — the sweet spot for frontier labs and neoclouds serving 'premium tokens' on open-source models (e.g., 5-10x faster serving of MiniMax models via SN40). SambaNova also supports disaggregated GPU-plus-RDU deployments — GPUs handle prefill (more raw compute), RDUs handle decode — at ratios like one or two GPUs per RDU.
What have you seen using AI within your own design and software process, and what does the roadmap look like on a three-to-five-year mark for the firm? 2:12:43 ↗
SambaNova uses a mix of open-source and frontier-lab models internally to manage token cost, running models efficiently on its own hardware and escalating to frontier models for the hardest tasks. On tooling, they never adopted CUDA — they built their compiler around a PyTorch-level dataflow representation, so developers describe parallelism (tensor/data/pipeline) at a high level and the compiler maps it to hardware. Roadmap: continue an ~18-month chip cadence (five or six chips taped out over seven years), close the HBM-generation gap with NVIDIA (currently HBM2e versus NVIDIA's HBM3), adopt 3D packaging and chiplets, and keep architectural flexibility as models evolve toward new transformer variants and more linear, state-space-style approaches — with SN50 shipped and SN60 next.
If SambaNova achieves all its design goals, what becomes the barrier to scaling up — is NVIDIA's moat really supply-chain lockup via balance-sheet dominance, and how is a company like SambaNova, aiming to be the next decacorn, getting the capacity to ship on a meaningful timescale? 2:20:15 ↗
Kunle didn't get to answer directly before the connection dropped again; Prakash answered instead: SambaNova's chairman is Intel's Lip-Bu Tan, so SambaNova will fab through Intel Foundry, which needs customers and has also invested in SambaNova. On NVIDIA, Jensen is under antitrust scrutiny and appears to be responding by funding new capacity (e.g., co-funding a glass-optics factory with Corning) rather than simply buying up existing capacity, which is harder to challenge legally. Smaller chip startups typically get capacity through Broadcom or Qualcomm, who hold swing allocation at TSMC and take a cut for granting access — that's largely how smaller players have secured fab capacity over the past year.
Read the transcript 69 passages

Timestamps open the recording used for this transcript.

1:33:19 ↗

Prakash: Our first guest of this morning — we have Kunle Olukotun. He's the Cadence Design Systems Professor of Electrical Engineering and Computer Science at Stanford University. But to the hardware engineering world, he's widely recognized as the father of the multicore processor. In the late 1990s, his Stanford Hydra project proved that the future of computing was not about making a single processor run faster, but about putting multiple processors on a single chip to handle many tasks at once — a fundamental design that powers almost every server, laptop, and mobile device we use today. Today he serves as co-founder and Chief Technologist at SambaNova Systems, a company that has completely rethought how artificial intelligence processes are built. Instead of relying on traditional graphics processing units — GPUs — which constantly shuffle data back and forth to memory, his team developed the Reconfigurable Dataflow Unit: a chip designed to stream data continuously, like an assembly line. This approach drastically cuts down the time and energy required to generate AI responses, specifically for complex, multistep, autonomous AI agents. He joins us at a critical moment for the AI industry. Over the past few months, SambaNova has launched its massive SN50 processor, announced a groundbreaking architecture partnership with Intel to split AI workloads across specialized chips, and secured a massive enterprise rollout with Vista Equity Partners. With reports circulating this week that SambaNova is targeting a staggering $10 billion valuation, Kunle is here to explain why the era of using one giant GPU for everything is coming to an end, and how dataflow architecture is making highly advanced AI practical and profitable for the enterprise. Hi, Kunle — welcome to the show.

1:35:35 ↗

Kunle Olukotun: Hi, Prakash. Thank you for having me. Hi, Nathan.

1:35:39 ↗

Nathan Labenz: Hi. Great to meet you — quick check, did we say your name right?

1:35:44 ↗

Kunle Olukotun: I think you cut out for some reason.

1:35:46 ↗

Prakash: Did we get your name correct?

1:35:50 ↗

Kunle Olukotun: Yeah, yeah — my name's just spelled phonetically, so you pronounce every letter, and you got it right.

1:35:56 ↗

Nathan Labenz: Amazing. Prakash, you take it — I'll refresh and come right back.

1:36:00 ↗

Prakash: Okay, so Kunle — this is, I think, a critical moment in the chip industry, because everyone is complaining about GPU prices, especially our friend Jensen Huang, NVIDIA's power and influence on the market, and the profit margins of NVIDIA.

1:36:23 ↗

Kunle Olukotun: Right.

1:36:24 ↗

Prakash: And can you tell us a little bit about how SambaNova has this different paradigm that addresses the issues with GPUs and brings down the total cost of ownership for enterprises?

1:36:43 ↗

Kunle Olukotun: Yeah, so SambaNova was founded in 2017, and it came out of ideas from Chris Ré, my co-founder — he's also a professor at Stanford, and a certified genius. The idea was: if you could bring software and algorithm ideas together with hardware architecture ideas — and as you said in your introduction, I've been working in the hardware architecture space for a long time — starting from a clean slate, how would you design an architecture that's optimized specifically for inference? Everybody thinks about GPUs as a kind of general-purpose computing substrate, but originally they were designed for graphics, and then they made a foray into high-performance computing. For high-performance computing, of course, you need a lot of matrix calculation capability, and at some point people realized you could use these things for executing machine learning models — the core of machine learning, and of course AI, is matrix multiplication. But when you want to train a model, clearly the core of the problem is how quickly you can do very, very large matrix multiplications. So what happened over time is GPUs put more and more of their silicon area into making bulk matrix multiplication better, using tensor cores. But once you've trained the model, you now need to use that model — that's the inference problem. And the inference problem is not really a compute problem, because as models get bigger, you now need to move the weights and what we call the KV cache into the compute units. That is essentially a data movement problem — a data movement problem from memory to the compute units, and a data movement problem between chip compute units. And, of course, you need to scale to multiple chips to handle the computational requirements, especially for very low-latency, high-speed inference. So our focus was: how do you design an architecture that minimizes the overhead of communication, and makes sure you most efficiently use the core resource in the system, which is memory? And memory isn't just one thing — it's a hierarchy of memories. The key is how you orchestrate that hierarchy, how you orchestrate the communication, such that you keep everything as efficiently utilized as possible. And if you do it right, you can get a 5 to 10x improvement over where GPUs are today.

1:40:17 ↗

Prakash: It strikes me that NVIDIA's solution around this has just been to increase the bandwidth — through NVLink, advanced HBM integration, and software optimizations like TensorRT-LLM and vLLM. So are they actually trying to brute-force their way into this?

1:40:40 ↗

Kunle Olukotun: Yeah — you definitely want to keep getting peak improvements on HBM bandwidth and chip-to-chip communication by using the latest technology. But the key is how effectively you use that bandwidth, how effectively you use that communication, and making sure you don't waste it. Whereas GPUs are often running at maybe 10 to 20% of the capability of their resources — the memory bandwidth and the communication resources — our goal in a SambaNova system is to push that to 70 to 80% of peak. So yes, everybody wants more capability from the underlying resources, but the key is keeping those resources as effectively used as possible. And that gives you more benefit for the cost you spend on providing higher memory bandwidth with the latest HBM, higher signaling frequencies, and communication bandwidth between chips using the latest variety of NVLink and so on.

1:42:15 ↗

Prakash: For a lot of the chip users, they often focus on this number — the model FLOPS utilization, the MFU. What's your North Star as you're designing the chip? Is that the strongest consideration, or are there other metrics you focus on?

1:42:34 ↗

Kunle Olukotun: No — the speed of light for doing inference, especially high-speed inference, is really the key thing. Everybody knows we're in the agentic AI era, and what one wants is what we call premium tokens. Premium tokens are tokens you can charge the most money for, because they're premium — they come from very large models, so they're accurate, but they're also delivered at high speed, so they're useful for an agentic environment that needs many turns through the models, and potentially has multiple models interacting. So the question is, how do you provide those premium tokens? You provide them by having very fast inference, and that's not going to be limited by floating point — it's going to be limited by moving the KV cache and the parameters from HBM memory to the compute chip. We like to think of this as memory bandwidth utilization. The speed of light is one — you use your memory bandwidth completely for one thing, or maybe two: moving the KV cache, and moving the parameters from HBM to the compute unit, every time you generate a token. In fact, in many instances you're underutilizing the FLOPS on the GPU or the compute unit, because you're running a memory-bound problem. Most of the problems one runs on GPUs, especially inference, are not compute-bound — they're memory-bound, or memory- and communication-bound.

1:44:48 ↗

Nathan Labenz: Could we zoom out and have you taxonomize the whole chip space? I know it's a big question, but people are familiar with things like Cerebras, which has this giant chip with a ton of memory on it. We've also seen instances of people burning the transformer architecture directly into silicon, with varying degrees of flexibility remaining as they pursue that strategy. I'm curious how you see the menu of different strategies — the different bets people are making — and the strengths and weaknesses of each. When you talk about the KV cache, for example — maybe we're in a world where we just keep pushing attention forever, and it always has to be dense at least at some layers, so that's a persistent bottleneck all the way to the singularity. Or maybe we're in a world where somebody figures out a state space model approach, and we move to a more linear paradigm where the KV cache isn't the constraint it is today. There are a lot of different directions this could go, but I'm really interested in your high-level map of the strategies people are pursuing, and what would tip you to think 'this pays off in this world' versus 'this pays off in that world.' Are there cliffs — places where, if models hit a certain size, a certain paradigm just stops working?

1:46:45 ↗

Kunle Olukotun: Yeah, that's a really interesting question — I think you can think about it along three different axes. One axis is flexibility versus specialization. Extreme flexibility might be something like a CPU, or to some extent a GPU — an instruction-driven execution engine. That's pretty flexible, but you always pay overhead for executing instructions, in terms of both silicon area and time. On the other extreme would be something very specialized for a specific algorithm — if that algorithm changed in any way, the silicon would no longer be useful. Fixing your architecture to transformers and burning your weights into the design would be an extreme case of that. But I've learned never to bet against the innovation capabilities of software and algorithm people — even over the time I've been looking at ML and AI, there's been tremendous change in algorithms. We're kind of fixated on transformers now, but transformers aren't just one thing — you've got various types of transformers, state space techniques, different ways of doing attention. So I'd be very wary of fixing any particular algorithm into architecture, because then you can't innovate. Another axis is what kind of memory you use. You've got very fast SRAM on-chip — probably half a gigabyte — you've got hundreds of gigabytes, or tens of gigabytes, of HBM off-chip, and then you've got terabytes of either flash or DDR. That's the memory access axis. And a third axis would be how you manage the memory transfers and communication — do you do it with instructions, making it very flexible, or do you do it completely in hardware? The way I like to think about dataflow is that it gets you into the sweet spot — especially reconfigurable dataflow — because it allows you to be flexible, but on the time scale that makes sense for AI models. You're not changing things every cycle; you basically fix the model for the duration of the inference. When another prompt comes along you may switch models, but typically you're going to fix that model on the machine for a while. So you don't have to be completely flexible, but you should be able to change the model and optimize for it. Reconfigurability gives you that capability. Now, on the memory access side: think about the size of the models — you need trillions of parameters. If you limit yourself to the memory you can fit on a single chip or a wafer, you're limited to maybe 40 or 50 gigabytes — half a gigabyte for a single chip, 40 to 50 gigabytes for a wafer. But a trillion-parameter model needs a lot more than that. So what you really want is to put the model in HBM, but use that HBM as effectively as possible — which you do with hardware mechanisms for moving data from memory to the chip and between compute chips. The idea is: how can you be completely flexible with very, very low overhead, almost none? The problem with GPUs is that they do use HBM and can run large models, but they synchronize the data movement and communication between chips all in software, which adds overhead — and that means they have a lot of trouble overlapping computation and communication. That overlap is, in fact, the key. You don't want to communicate by waiting until you need to, then running instructions to move the data — you want to construct a pipeline where communication is just one component. In dataflow execution, communication is happening all the time; it's just one of the pipeline stages, happening for one piece of the model's computation while computation for another piece happens in some other stage of the pipeline. It's a classic idea from computer architecture — pipelining, and using a memory hierarchy to move data where you need it, when you need it. The nice thing about AI models is that you have a graph of computation, and the whole idea of dataflow is to take that graph and map it onto the machine spatially, so you keep all the pieces of the model operating at the same time, on different components of the computation.

1:53:46 ↗

Prakash: Can you contextualize a little bit? Let's say you have a Llama 3 model, and you have a normal NVIDIA H100 or B200 chip versus an RDU chip — what's the difference in the amount of HBM required? Is there a sense of, like, you'd say, 'okay, this—'

1:54:10 ↗

Kunle Olukotun: It's not really a capacity question — it's really a bandwidth question. There are two ways the GPU uses bandwidth in ways that aren't optimized. One is that they divide the decode algorithm — to decode a single token, you've got multiple steps of the decoder. Take one step of the decoder and think about all the kernels that have to execute to run that decode step. The way the GPU typically does it is to execute the decode algorithm one kernel at a time. There are some big kernels, like flash attention, that have been optimized, but in general there are multiple kernels, and two overheads happen. One is that you have to move data from the GPU's registers, from one kernel, to HBM, and then the next kernel has to go fetch that data back into the GPU. That's wasted HBM bandwidth.

1:55:38 ↗

Prakash: Right.

1:55:39 ↗

Kunle Olukotun: The other aspect is that you spend time launching that kernel and synchronizing between the two kernels — time when HBM isn't actively being used. So you're wasting bandwidth you shouldn't waste, and you're not fully utilizing HBM during that time either. The way things work on an RDU, in dataflow, is you take the decoder and make it a single kernel. Then you go further, with a technique we've developed called kernel looping — because you've got a single kernel, and, thinking about Llama 3 70B, for instance, you have to run that decoder 32 times. You keep that single kernel decoder resident on the array of chips the whole time and just keep looping. The net result is you keep the HBM completely occupied.

1:56:48 ↗

Prakash: Right.

1:56:49 ↗

Kunle Olukotun: And you never send any intermediate data between the kernels across the GPU-or-RDU-to-HBM boundary. So you get both a more efficient use of the HBM bandwidth and a more complete use of that bandwidth. But we're not done yet, because the key innovation I alluded to earlier is that, since you're running across multiple chips using what we call tensor-level parallelism, at some point you need to gather all those results together — in an all-reduce.

1:57:25 ↗

Prakash: Mhmm.

1:57:26 ↗

Kunle Olukotun: That's communication, and you don't want that communication to be something that stops the pipeline. What we're able to do is communicate from one RDU chip's SRAM to another RDU chip's SRAM without going through HBM — we terminate the communication inside the SRAM. So we don't use HBM bandwidth for that, and more importantly, it means we can treat the communication as just another pipeline stage that overlaps with all the other kernel components of the decode algorithm. That gets us this more effective use of HBM bandwidth — we keep the HBM running, utilized all the time, which is that metric we talked about, memory bandwidth utilization. This is how we push it as close as possible to one: we only move the data we absolutely have to move from HBM — the KV cache and the parameters of the model — and make sure that interface is used close to 100% of the time. Going back to why we can do this extreme fusion into a single kernel: it's because we have more SRAM on the chip. You could say, well, I'll put everything on SRAM — the intermediate data between kernels, and also the KV cache and parameters — but if you only use SRAM, you end up with a very expensive system. So the key idea is to build a system that's scalable. With our latest version, the SN50, you can scale all the way to 32,000 chips if necessary — in scale-out and scale-up, we can go to hundreds of chips. That gives you the ability to run these large models very cost-effectively, while also getting very high-speed decode by using dataflow to effectively exploit tensor parallelism. One of the limits of GPUs is that, because they don't effectively overlap communication and computation, they have a hard time using tensor parallelism beyond 4- or 8-way. We can go to much wider levels, which means we get higher-speed token generation.

2:00:44 ↗

Nathan Labenz: This has been fantastic.

2:00:45 ↗

Kunle Olukotun: To your question, Nathan — if you think about where the different architectures sit: GPUs are, in terms of flexibility, highly flexible — they're instruction-driven — but their overheads mean they're limited by that instruction overhead. They do have the advantage of using HBM capacity to run very large models. If you're thinking about Groq and Cerebras, they're SRAM-based, so they can't very cost-effectively handle very large models — once you get to trillion-parameter scale, it's unclear how you gang enough systems together to handle models that size. And they might claim to be dataflow, but I'd say they're not quite dataflow, because they still involve instruction overhead in synchronization and orchestration. The key to dataflow is to hide all the overhead of communication by putting that synchronization and orchestration in hardware — and that's what we do in the RDU design at SambaNova.

2:02:30 ↗

Nathan Labenz: We're at the time we had booked — do you have time for a couple more questions? Great. Could you talk a little about what bullets you have to bite with this architecture? You alluded to at least one, on not targeting the training market. Curious if there are other big trade-offs you're accepting. And I'm also curious how this translates to the Pareto frontier for your customers — we see the emergence of 'fast mode,' and there's clearly a trade-off between speed of response and batch size, which obviously translates to cost. Could you characterize how the Pareto curve you offer customers compares to other Pareto frontiers, in terms of volume-versus-speed trade-offs? And what kind of customer is the sweet spot for you — someone who needs more of one or the other, versus the hardware we're more familiar with?

2:03:55 ↗

Kunle Olukotun: Can you say that last bit just again?

2:03:58 ↗

Nathan Labenz: Yeah — with the idea in mind that there are these trade-offs, and probably the trade-offs with a SambaNova system are different from other available systems one could buy, what does that translate to in terms of the most natural customers for you?

2:04:13 ↗

Kunle Olukotun: Yeah, that's a really good question. Everybody's seen the Pareto curve Jensen put out — the trade-off between throughput on the y-axis and speed-per-user on the x-axis. What we see is that on our previous generation, like SN40, we could match GPU throughput at 3 to 5x higher speed. On the SN50, we don't have quite as much raw compute, so at very, very large batch sizes GPUs do very well. But once you get over 250 into the 500-tokens-per-second-per-user range, we can achieve those speeds at throughputs 3 to 5x better than what a GPU can provide. So if you're a frontier lab or a neocloud that wants to provide premium tokens — especially serving open-source models — that's the sweet spot. If you look at a MiniMax coding model, for example, going through our service you can get speeds 5 to 10x faster on MiniMax 2.7 compared to other providers, because it's powered by our SN40 capability, our previous generation. SN50 provides even more, because it can scale to a much larger number of chips using the techniques I described. So going back to the premium-token idea — that's the ideal customer for us, somebody who wants to provide premium tokens to their users. Another good use of our system is something we announced at Computex a few weeks ago: the idea that you can pair an RDU system with a GPU system in a disaggregated manner. Because GPUs have more raw compute capability, they're better at prefill, and RDUs are much better at decode, which is the ultimate limit. So you can do prefill on a GPU — using existing systems you already have in the data center — and then bring in RDUs at some ratio, one-to-one or two GPUs to one RDU, to get very fast decode capability.

2:07:25 ↗

Prakash: One of the questions I had for you — we've had a guest, Bing Zhu, on the show before, and they were doing PTX-instruction-level optimization models.

2:07:37 ↗

Kunle Olukotun: Might be Mark.

2:07:43 ↗

Prakash: They were doing PTX instruction models?

2:07:47 ↗

Nathan Labenz: We can hear you. Hearing.

2:07:54 ↗

Kunle Olukotun: Are you hearing me?

2:07:56 ↗

Prakash: Yes, we can hear you fine. If you switch from earbuds to your computer mic and then back, it'll refresh — so, we can hear you fine.

2:08:13 ↗

Kunle Olukotun: I'm not hearing.

2:08:30 ↗

Prakash: So maybe just refresh — just press refresh on the page. Oh, he can't hear us, I see. We're going to drop off. Oh, well.

2:09:33 ↗

Nathan Labenz: Never a dull moment in the live-streaming game.

2:09:36 ↗

Prakash: Yeah, doing it live always has a bit more risk. Alright, we'll see if we can — or we'll just message, I think. So, sudden drop-off. Let's see, I don't know if we—

2:10:04 ↗

Nathan Labenz: —have Brian here as well in the background. Brian, if you can hear us, maybe send a ping for just a quick page refresh — I think that would be all we need. I sent that via email too.

2:10:27 ↗

Prakash: Notes for improvement — room for improvement here.

2:10:32 ↗

Nathan Labenz: This is the — shouldn't the banner's attention, whatever API is filling in the headlines on the screen, send a signal to have him refresh the page? Let's see if that works — prompt-injecting our headline writer. I could also come back — he might hear me if I come back. It'd be another—

2:11:14 ↗

Kunle Olukotun: Yeah.

2:11:15 ↗

Nathan Labenz: —possible switch. Alright, let me refresh as well, and then maybe you'll also get the hint if I refresh.

2:11:21 ↗

Prakash: Yeah.

2:11:30 ↗

Nathan Labenz: Alright, I'm back — can you hear me now?

2:11:34 ↗

Prakash: He saw the refresh, I think — so maybe once he comes back we'll do a quick roundup and let him go, we'll stretch his time a little bit. So the whole architecture question is fascinating, because it indicates that there are ways around the NVIDIA monopoly, and people are working hard on them, so one does hope that we can — there we go.

2:12:22 ↗

Kunle Olukotun: I'm not sure what happened there. I'm sorry.

2:12:25 ↗

Nathan Labenz: That's on us.

2:12:27 ↗

Prakash: Yeah, sometimes it's our fault, sometimes it's LiveKit's fault. I get emails from the dev team like, 'oh, we had an outage.' I'm like, 'you should have told us that before.'

2:12:37 ↗

Kunle Olukotun: Yeah, okay.

2:12:42 ↗

Nathan Labenz: But we're back.

2:12:43 ↗

Prakash: We're back, okay. Let's just round up — what have you seen in terms of using AI within the design process, within your firm, to build software and build better tools around this whole idea? And where do you see things going? And the second question — what does the roadmap look like on a three-to-five-year mark for the firm?

2:13:14 ↗

Kunle Olukotun: Yeah, well, I think this is something I'm interested in both within SambaNova and, it's a big component of my research at Stanford — how do you use AI tools to speed up the design process. Of course, like every other firm, we're actively using AI, both open-source AI models and frontier-lab models, in conjunction, because you want to control token cost. We've got models that run very efficiently on our own machines, so we combine them for tasks the open-source models can handle, and then for the very challenging tasks, of course, we'll go to the frontier models to take advantage of those capabilities. So yeah, that's used throughout the firm for all sorts of software development. We never use CUDA in our software stack — we never thought CUDA was the right way to think about designing these compilers. We started with the PyTorch representation of the dataflow in the AI model, and our whole goal was to take that representation and map it into our machine in a dataflow way — which completely sidesteps CUDA. From the developer's point of view, what we wanted them to do is describe how they want to optimize their model at the PyTorch level. Parallelism in these models happens in multiple dimensions — tensor, data-parallel, pipeline-parallel — and you should be able to describe those dimensions, and then our compiler takes those directives and does the appropriate mapping. So that removes the need for the user to write low-level code like CUDA, but still achieves the performance levels and mapping control they need for high performance.

2:15:59 ↗

Prakash: Yeah.

2:16:00 ↗

Kunle Olukotun: Yeah, so we'll continue to push on that. Over seven years we've taped out five or six chips — we're on a cadence of roughly every 18 months for a new chip. We continue to push on our ability to provide premium token inference, which means focusing on more bandwidth. Traditionally we've been one generation behind NVIDIA in terms of technology, definitely HBM technology — our current designs use HBM2e, and we're able to compete with their HBM3. But we want to keep using higher-performance, more recent HBM, take advantage of new packaging ideas like 3D packaging and chiplets, and think deeply about how we design the next generation of architecture to take advantage of both new memory bandwidth capabilities and the ability to scale out and up. We want to make sure we can get very, very fast inference on very large models, and the key to that is exploiting parallelism — especially the kind that requires communication between multiple RDUs. Figuring out how to do that without the inter-chip communication getting in the way is going to be the key challenge, and we've got all kinds of interesting ideas about how to do it. We want to be the highest-performance, lowest-cost inference provider, in terms of the capabilities we provide from RDU technology — with the SN50, which we've announced, the SN60 coming down the pipe soon, and future generations focusing on the same thing. We also want to maintain flexibility, because I see the landscape of AI models continuing to change — there will be new varieties of transformers, there will be state space models, there will be ways we fundamentally have to transform the algorithms to make them more linear, because we can't keep going in this quadratic direction if we really want to enable everybody to use AI in a cost-effective manner.

2:19:24 ↗

Nathan Labenz: This has been fantastic, and I really appreciate you staying a little long with us. If I can dare to ask just one more question—

2:19:32 ↗

Kunle Olukotun: Sorry, I can't hear what Nathan said.

2:19:35 ↗

Nathan Labenz: Can't hear me again? Oh my god — Prakash, can you hear me? Alright.

2:19:39 ↗

Prakash: I can hear you. Kunle, can you hear me? You can.

2:19:43 ↗

Nathan Labenz: Okay, I may not hear Prakash either — so bizarre.

2:19:47 ↗

Prakash: So bizarre. Alright, let me switch this.

2:20:00 ↗

Nathan Labenz: Note to our agents as they go through the transcript — we need, like, a refresh button in our producer view to just refresh somebody's—

2:20:12 ↗

Kunle Olukotun: Okay. Thank—

2:20:15 ↗

Nathan Labenz: —you for joining us. Sorry for the technical difficulty, but this has been great. That was a little rough. The last question I wanted to ask is: let's say you achieve all your goals in terms of design — what will be the barriers to scaling up? Maybe we can send you an email and get a little extra thought on this to share back. But in previous rounds of going down the 'what is NVIDIA's moat' rabbit hole, one candidate answer has been conviction, balance sheet, and lockup of the supply chain — that they're just willing and able to buy out capacity from key suppliers for years to come. I've heard that for a while, but we've seen there's at least enough slack in the market for decacorn companies to pop up. And it seems like, as you mentioned in the intro, SambaNova is trying to be the next decacorn in the space. So what's happening there? Have the suppliers said, 'we're going to cap what NVIDIA can buy so we don't lock ourselves into a monopsony future'? Are there clauses that allow for that kind of flexibility? How is it happening that somebody can come into this supposedly — and I think not just supposedly — super input-constrained, super complicated supply chain, and buy their way into being able to ship finished product on a timescale that matters? I don't have a great sense for that, so—

2:22:15 ↗

Prakash: I kind of have a sense for what's happening right now. Number one, SambaNova's chairman is Lip-Bu Tan at Intel, so they're definitely going to use the Intel Foundry — and the Intel Foundry doesn't have enough customers. Lip-Bu has been signing with Apple and others, trying to get them to use Intel packaging and Intel chip manufacturing fabs. Intel has also put in an investment in SambaNova, so I think it's clear they're going to tape out and produce at Intel. On the NVIDIA side — I think Jensen is always under antitrust-type scrutiny now, and he's got all these very powerful hyperscalers around him, annoyed with his pricing, so he's got to be aware of it. He is making deals — he signed a deal with Corning, a glass manufacturer for optics, this week, and he's co-building a factory with them. I think he's put in something like 40 to 50%, they put in the expertise, and basically he'll buy the product. So he's building out factories, and it's a little hard to call that an antitrust issue, because the factory wouldn't exist if he hadn't put the money in — it's not him buying out capacity that already exists, it's creating capacity that didn't exist in the market. That's harder for an antitrust case, and I think they're aware of that, so they're targeting things where they can start to own pieces of the supply chain directly. For the smaller chip startups, what ends up happening is that Broadcom, or some of the larger players, have allocated wafer capacity at TSMC, so the smaller guys end up going through Broadcom, and Broadcom takes a cut on that — they basically manufacture through Broadcom's relationship at TSMC. Qualcomm also has some allocated capacity, so Qualcomm can swing a little bit too. So these bigger players have some allocated swing capacity in the industry that smaller guys can use if they pay for it. That's roughly what's happened over the past 12 months or so — it's not that you can't get capacity, it's that you have to go through the people who already have it, and do deals with them to make it work.

2:25:05 ↗

Nathan Labenz: Nice — great answer.

Clips from this conversation

Inference Is Not a Compute Problem
Open clip ↗
SambaNova Bypasses CUDA Entirely
Open clip ↗
Cerebras Is Not Truly Dataflow
Open clip ↗
3-5x Better Throughput Than GPUs at High Speed
Open clip ↗
Disaggregated Inference: GPU Prefill + RDU Decode
Open clip ↗

Closing

Closing

The hosts stayed on to decompress after Kunle's departure — pulling on the threads from the interview and the morning's news: where the economics of reasoning-model and agentic inference are actually heading, and what the government-fuses-with-the-frontier week means for who captures AI's gains.

Prakash and Nathan closed out the show by circling back to the frontier-chip-architecture conversation from earlier in the episode — Prakash summarizing the guest's explanation of SambaNova's "conveyor belt" dataflow chip against the GPU "hub-and-spoke" model, and Nathan flagging his general wariness of new-architecture-vs-baseline comparisons. They traded theories on Nvidia's blocking constraints, the two-wave pattern of frontier chips falling into inference use (citing H100s and xAI's Colossus clusters), and why the chip business overall is set to get much bigger as it fragments into niches.

Nathan revisited a prediction he got wrong — that inference would become "too cheap to meter" — walking through GPT-3-era pricing versus today's token hunger and the shift to a "market-clearing-price" era where chip scarcity, not model economics, now sets the floor. Both hosts speculated about whether 2026 brings another capability step-up (Nathan bet yes, citing Fable and historical cadence) and whether that translates into real revenue growth for mature consumer businesses like Nike, using Nathan's recent conversation with Neural Concept (aerodynamic-validation agents for Formula 1 and automotive) as a template for how an agentic design-and-validation loop could eventually apply to shoe design.

They wrapped with a lighter aside about Elon Musk's under-exploited materials-science data, a nod to America's upcoming 250th anniversary, and a sign-off until next week.

“All compute is food for these AIs.”

“Here's to virtuous leadership long into the future.”

Read the transcript 32 passages

Timestamps open the recording used for this transcript.

2:25:13 ↗

Prakash: I finally kind of understood what the new paradigm is. So, correct me if I'm wrong, but basically what he said is that a normal GPU acts a little bit like a hub-and-spoke system: for every step of the decode process, it goes back to the hub and then to the spoke for processing, then comes back. Whereas for these new chips like SambaNova, they're acting like a conveyor belt — it goes to the first one, the second one, the third one, the fourth one, which is what it's supposed to do anyway because that's the defined sequence of steps. So that's the difference between the GPU paradigm and this paradigm. Is that roughly what was going on?

2:26:05 ↗

Nathan Labenz: Yeah, I think that aligns with my understanding. I mean, I'm always, in general in AI, a little wary when people compare their technique to some baseline, depending on how well I understand that baseline versus what's actually running in optimized form in production. I'm always like, okay, that sounds right — are they actually doing it that way, or do they have some other workaround or optimization that narrows the gap relative to the naive path? We've seen this with transformers a million times, where people say, 'Oh, my new architecture outperforms the transformer.' But it's like, well, which transformer? If you're using the 2017 initial transformer as reference, you're obviously way underselling what it is today in fully optimized form. So I'm always a little wary of that kind of thing, at all levels of the stack. But I think that what you're saying there adds up. And then there was also this other big concept of blocking versus non-blocking.

2:27:19 ↗

Prakash: Yeah.

2:27:20 ↗

Nathan Labenz: And I don't quite understand that as deeply as I'd like to either, especially when it comes to how hard it is for Nvidia to get out of that problem. Is there a reason that's sacred in their architecture, or is there an opportunity for them to relax an assumption or two and get to where SambaNova is on that dimension with the next generation? I'd be speculating — definitely out of my wheelhouse and out of my depth to say much more than that. But, yeah, what bullets would Nvidia have to bite to not have these blocking issues? Unclear.

2:28:13 ↗

Prakash: So let me give you kind of an industry-structure framing. Maybe — Nvidia chips are good for the frontier because the GPUs are eminently reprogrammable, and you can run multiple architectures on them, and you can develop new architectures on them. So what ends up happening is that if the frontier advances quickly, the GPUs get utilized for that. If the frontier advances slowly, people start optimizing for inference. So you have two waves: on one side, the frontier advancing — if it's advancing fast, people need to be at the frontier, and there's not enough time to optimize the inference. But as the frontier advances, and then six, nine, or twelve months behind that frontier, you get the inference-optimization wave following up. So the frontier chips first get used for the frontier, and then they fall into inference. The GPUs are imperfect for inference, but they're also depreciated, because they were used for the frontier and now they can be used for inference. That's why the H100s are still being run for inference, for example — people no longer develop leading-edge frontier models on those chips anymore, but they're good enough for inference. So you get these two waves, and it's kind of similar to the two waves we see in the model labs versus open source — you have the leading edge creating the new stuff, and then you have this optimization, distillation, and consolidation wave following up, reducing cost. So you have these multiple waves proceeding through the industry at multiple layers simultaneously. Does that make sense?

2:30:10 ↗

Nathan Labenz: Yeah, I mean, he did specifically note that they've historically been one generation behind Nvidia, so that definitely reinforces that notion. We also heard something similar from xAI — they were willing to rent Colossus 1 to Anthropic, probably because they didn't have a lot of inference load themselves, but also because it was a mixed-chip environment, and that was becoming problematic for training. Colossus 2, which is a more homogeneous environment, is just a better place to train, and so they didn't really need the first one as badly anymore — they didn't feel like they were sacrificing their frontier work to rent out what had kind of become more of an inference-capacity facility. So I'm trying to think of what the complications of that would be, or if there's a counter to it, but all the data points coming to mind so far support the general paradigm you're laying out.

2:31:33 ↗

Prakash: I think the chip business in general is just going to get so much bigger. There's enough food for everyone — the entire business is going to get so much bigger because you're going to get all these different niches where different players can thrive. It's really a swing back to, like, the mid-nineties chip era again. So—

2:32:05 ↗

Nathan Labenz: Yeah — all compute is food for these AIs. That was the title, and a song lyric, from an episode of the podcast I did with Jeffrey Ladish from Palisade. And I've got one coming up with Ramin, the CEO of Liquid AI, too. I'm just thinking more about how even small bits of compute are starting to become relevant. The cell-phone market is $500 billion a year — it's been at the scale of the data-center buildout for quite a while now. The data-center buildout has now surpassed it in terms of annual scale, I think, but not by that much, and not for that long. So I do think we're going to see — it always comes back to everything, everywhere, all at once. Pretty soon — this is also, as I look back and think about the predictions I got wrong — one big one I think I got wrong was that inference would be really cheap. There was a time — in a way I'm still right, depending on how you want to look at it, but it's definitely not as cheap as I thought. It doesn't feel super abundant, to the point where it's too cheap to meter. We have not hit that level. And I don't know if I was expecting too cheap to meter, but I was definitely expecting closer to that than where we are right now. The way in which I was right is that Fable is still cheaper than the original GPT-3 — that was $60 per million input tokens, $60 per million output tokens, no caching, twice as much if you did fine-tuning, and obviously dramatically less capable in all regards. I think what I underestimated was just how many more tokens a frontier model would use. We were putting in a couple thousand at a time to GPT-3 and thinking, 'Oh my god, this is fifteen cents to make one API call.' That felt like a crazy thing when, in general, API calls in any other kind of API were like a tenth of a cent or less. But then we saw dramatic cost reductions with 3.5 and Turbo and those kinds of models — they dropped costs by almost two orders of magnitude, like a 98% cost reduction with a performance improvement. And at that point, it wasn't so much token hunger. Now we see this incredible token hunger. I still think there's an interesting question there. Another thing that's really changed is we've moved to a world where we're now in the market-clearing-price era, as opposed to the labs trying to use up — trying to create the market out of nowhere and get the whole thing going era. So now we're at a place where you could run things for a lot less, but it's just not available, because the market for chips continues to push prices up, as we've discussed many times, even on old chips. So I underestimated token hunger, and I underestimated demand bidding up compute regardless of all other progress.

2:35:49 ↗

Prakash: Mhmm.

2:35:50 ↗

Nathan Labenz: Even still, cost per million is down, which isn't amazing, but we're in a metered world. That's for sure.

2:36:02 ↗

Prakash: I suspect the metered world is temporary, because I think what ends up happening is people have budgets, and firms have to capture wallet share, basically. The whole sticker-shock thing, I think, doesn't work — they either have to pay for performance, in the sense of, okay, you get a new cancer drug, you get paid for that — that's something measurable, like return on investment. Or you're a cost, not a revenue item — you're a cost item, and then it becomes, okay, this is how much I can afford, I will buy all of the most intelligent stuff that I can get within this budget. And I think that's what's happening right now — this reconfiguring of the market. We had this first expansion, we had the blowup earlier this year, and now this is reconfiguring to, okay, this is my wallet share, what can I get with this wallet share? The one thing I think is the X-factor here, which I don't know how it's going to work out, is whether these models become so much more intelligent this year that you again get this expansion of budgets — 'we've got to have it,' everyone has to spend tokens, this is the most important thing — which is basically what we had earlier this year. Do we get another capability step-up where that kind of thing happens, you think?

2:37:43 ↗

Nathan Labenz: Yeah, I'd bet on one more this year. The first hinge point was probably — whatever people date it to — Opus 4.5 to 4.7, somewhere in there. The second one is Fable. Fable was done training early this year — it took us a while to get it, we've obviously had drama around it, but it's hard to imagine there's not a significantly better step coming in the second half of the year. And maybe two, if you listen to the people closest to it — and it's always served me well to take their statements, both publicly and reading between the lines, and any private statements where I'm not told secrets but given general direction as to what they're expecting — it's always served me well to take that at pretty much face value. And what I think the signal is from the folks at the frontier companies is: things are speeding up, they're not slowing down. We're entering the era of recursive self-improvement. There's probably still a lot of low-hanging fruit at all kinds of different levels of the stack. So, yeah, we probably should expect at least one more significant turn within the calendar year. I'd be very surprised — I mean, it would be the first time in many orders of magnitude of inputs that we wouldn't get another significant step on that timescale, if we were not to see one the rest of this year. So I'd have to imagine it really is coming. And certainly they're building out with the conviction — they're doing everything they can to secure capacity — with the conviction that something like that is coming, and that the exponential of demand for their products will continue, or super-exponential, potentially even.

2:40:06 ↗

Prakash: Yep. They do have to start providing significant value — that's the thing. The first step, coding — okay, yes, now everyone has software coders on standby, like infinite software coders. Okay, great. But, you know, like a Nike, for example — okay, so now your team is using tokens, but what else can you do for me? How else can you increase my revenue? Cutting cost is not that significant — American firms rarely focus on cutting cost that dramatically, except if it's a downturn. And if it's a downturn, they have a stash of employees they're prepared to let go, who've already been pre-identified, and they just let go. So I think the key thing that makes people buy something is revenue increase. How do these models increase Nike's revenue? They have to do something for the marketing, or make people buy more shoes — how does that work? I don't know — I can see it for coding, but for Nike, how do you get them to allocate their IT budget almost exclusively to you? That's still—

2:41:41 ↗

Nathan Labenz: Yeah, I mean, how elastic is demand for shoes? I'm not super sure. I'm personally making progress on my 2026 goal of spending more time outside, getting more exercise — I think there's probably an extra pair of shoes in 2026 for me as a result of pounding the pavement more, liberated from my desk via AI. So that's one happy story, but my guess is that doesn't move aggregate shoe demand in the immediate term. So I'd say it's probably tough for a business like that immediately. But then I think about — I just did this episode, came out yesterday, with Thomas von Chalmer, who runs the U.S. division of a company called Neural Concept. They may provide some inspiration for how you could imagine a company like Nike taking their business to the next level. So basically what they do is, traditionally, they provide models that validate designs — engineering designs, CAD designs — on a variety of dimensions, one big one being aerodynamics. And they actually work with Formula 1 teams, which I didn't realize — I've never been a Formula 1 fan, but they actually have rules around how much compute teams can use from week to week to optimize their design for aerodynamics, and whatever else. You're literally compute-limited as an F1 team. And if I understood correctly, there's also a kind of handicapping where the best teams actually have lower compute limits than teams that aren't doing as well. That's fascinating in itself. They have Formula 1 customers, they also have major automotive manufacturers, and their break-into-the-market point was these models that allowed you to run validation of things like aerodynamics or heat dissipation much faster than physics-based simulations would allow, so you could more deeply explore the design space and get your designs more optimized before you ever have to make a prototype, etcetera. Now they're also bringing an agent to market at the same time — so now you can have a Neural Concept agent that actually works in your CAD platform, similar to your human engineers, and it can call out to these models and say, 'Hey, I just made a tweak — validate me with the aerodynamic model,' or whatever, give me that feedback, and they can run this tight loop of agentic exploration, validation, and optimization — which is the perfect formula for reinforcement learning. To the degree that they want to take a hand in training models, it's going to allow their agents to get quite good at climbing these hills. We should, of course, expect — I actually think Grok is a good candidate to get really good at that kind of thing.

2:45:18 ↗

Prakash: I always thought Elon should just focus on that. They have so much, like, you know—

2:45:24 ↗

Nathan Labenz: He's so distracted by various kinds of porn and whatever. Yeah.

2:45:28 ↗

Prakash: They have so much internal data, which no one else has, on airflow and material science and all this stuff, and he ends up focusing on LLMs — Grok, Imagine, whatever. Google would love to have all that aerodynamic data, all that data on that stuff — you would love to have it. And they have a team that can do experiments too, so you could set up what Periodic Labs has done — set up a robotic experimentation lab, and get a hit on material science and all of these things. And he ends up, you know, back in LLMs. So that's a little bit disappointing, I think. So—

2:46:20 ↗

Nathan Labenz: Yeah, I wouldn't count him out just yet. Never bet against Elon has always served me pretty well too. I mean, to land the plane on the Nike analogy — if you can get that loop closed, and you get this sort of agentic model making design tweaks, getting validated, getting really good at climbing that hill — that's a pattern that basically works for everything. I'd bet that Nike has — clearly they have some way to forecast demand for products — does that extend to the point where they have a sort of black-box ML model that takes in just a design of a shoe and predicts how popular that will be? Maybe, maybe not. It'd be interesting to see if we can get an answer to that question. If they do have that—

2:47:15 ↗

Prakash: Mhmm.

2:47:16 ↗

Nathan Labenz: Then you can imagine them having an agent that actually does the shoe design, and kind of closes that loop again. So how can they drive more revenue? One big answer, which they're already quite good at — but you can imagine another order of magnitude — would just be infinite designs, an even more extreme long tail, and personalization even. And if that becomes a token-budgeted process as opposed to a human-shoe-designer process, then if we're all rich and enjoying abundance in general, maybe we buy, like, two times as many shoes, along with a bigger basket of everything else. But maybe they can only realize that if they can really scale that design-and-validation loop to the point where I can get something nobody's ever seen before, and you can too.

2:48:21 ↗

Prakash: Which is an ROI loop, right? Which is a reinforcement-learning loop at the end of the day — a reinforcement-learning loop with human input for taste. Yeah.

2:48:35 ↗

Nathan Labenz: So, I mean, Nike — I think you're right to say Nike seems like one that's relatively mature, not as likely to see massive growth as a result of AI as some other things might. But still, we can tell a story.

2:48:56 ↗

Prakash: You know, basketball shoes weren't a big thing in the 1970s — it was really post-Michael-Jordan, like late-eighties-ish, when Michael Jordan signed with Nike, and then it took off. So you could maybe see Nike get a marketing proposal of that kind for some other segment — maybe old people's shoes, or orthotics, whatever — some other segment of the market, and all of a sudden that segment also becomes a place where you can take five dollars of plastic and sell it for a couple hundred bucks. So maybe that's the thing. Maybe that's the thing that happens. Who knows?

2:49:48 ↗

Nathan Labenz: All the senior living communities are gonna be on fleek with the shoes, perhaps.

2:49:56 ↗

Prakash: Do we—

2:49:57 ↗

Nathan Labenz: Do we still say 'on fleek'? I don't know. I don't know where that came from — that's a deep cut. But, yeah, we'll know if my mom's wearing multicolored custom designs in the next 12 months, we'll know how it happened.

2:50:12 ↗

Prakash: Yeah, indeed. And on that note, Nathan — good morning. So, it is two days before America's 250th anniversary.

2:50:26 ↗

Nathan Labenz: Amazing. How about that?

2:50:27 ↗

Prakash: How about that? So, happy birthday to the republic, and we will see viewers and listeners next week.

2:50:37 ↗

Nathan Labenz: Here's to virtuous leadership long into the future.

2:50:42 ↗

Prakash: Indeed. Bye bye.

2:50:44 ↗

Nathan Labenz: Thanks, Prakash. Bye for now.

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